According to an example, a state-retaining logic cell may include a plurality of invertors. The state-retaining logic cell may further include an output node NVM storage cell connected adjacent an output node of one of the inverters.
申请公布号
WO2014163616(A1)
申请公布日期
2014.10.09
申请号
WO2013US34909
申请日期
2013.04.02
申请人
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
发明人
LESARTRE, GREGG B.;BROOKS, ROBERT J.;BUCHANAN, BRENT EDGAR