| 摘要 |
[Problem] To provide a semiconductor device in which gate oscillation phenomenon during switch off can be suppressed without externalizing the capacity and resistance to between the gate and a drain. [Solution] A semiconductor device (100) including a MOSFET section and a gate pad section that are demarcated on a semiconductor substrate (110) in which a low-resistance semiconductor layer (112) and a drift layer (114) are laminated, in which the gate pad section contains: the low resistance semiconductor layer (112); the drift layer (114) that is formed on the low resistance semiconductor layer (112); a polysilicon layer (136) and a gate pad electrode (138) that are formed on the drift layer (114) via a field insulation layer (134), and cross the entire surface of the gate pad section as conductor layers; and, on a surface of the drift layer (114), a gate oscillation suppressing structure (132) in which p+ diffusion regions (132a) that are electrically connected to a source electrode layer (128), and p impurity non-diffusion regions (132b) are alternately formed. |
