SYSTEMS AND METHODS OF WRITE PRECOMPENSATION TO EXTEND LIFE OF A SOLID-STATE MEMORY

摘要

Write precompensation mechanisms for non-volatile solid-state memory are disclosed. In one embodiment, programming verify voltage levels are lowered from the default levels in the early life of the solid-state memory. As memory errors increase beyond an error threshold, programming verify voltage levels are increased by one or more voltage step sizes. This programming verify voltage level increase can be performed until default levels are reached or exceeded. As a result of lowered programming verify voltage levels in the early life of the solid-state memory device, solid-state memory experiences less wear and the operational life of the memory can be extended. Disclosed write precompensation mechanisms can be used for single-level cell (SLC) and multi-level cell (MLC) memory.