发明名称 MULTILEVEL INTERCONNECT STRUCTURES AND METHODS OF FABRICATING SAME
摘要 A multilevel interconnect structure for a semiconductor device includes an intermetal dielectric layer with funnel-shaped connecting vias. The funnel-shaped connecting vias are provided in connection with systems exhibiting submicron spacings. The architecture of the multilevel interconnect structure provides a low resistance connecting via.
申请公布号 US2014300005(A1) 申请公布日期 2014.10.09
申请号 US201414304111 申请日期 2014.06.13
申请人 STMicroelectronics S.r.I. 发明人 Di Franco Antonio;Bonifacio Marco;Cristofalo Silvio
分类号 H01L21/768;H01L23/48 主分类号 H01L21/768
代理机构 代理人
主权项 1. A method for fabricating a multilevel interconnect structure with a first conducting level and a second conducting level, comprising: depositing a first dielectric layer over the first conducting level; depositing an intermediate dielectric layer on the first dielectric layer; performing chemical mechanical polishing after depositing the intermediate dielectric layer, wherein the chemical mechanical polishing ends below an upper level of the first dielectric layer; depositing a second dielectric layer touching the intermediate dielectric layer and the first dielectric layer; and opening a funnel-shaped connecting via through the first dielectric layer and the second dielectric layer, wherein the funnel-shaped connecting via comprises an upper wide portion opened only in the second dielectric layer and a narrower lower portion with two vertical or almost vertical sidewalls extending in both the first dielectric layer and the second dielectric layer, wherein the upper wide portion is formed using isotropic etching and the narrower lower portion is formed using anisotropic etching.
地址 Agrate Brianza IT
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