发明名称 HIGH SPEED RING/BUS
摘要 A data communication bus and method of operation thereof, including a plurality of nodes connected to a respective plurality of media segments. A typical node includes an output port coupled to a media segment that it exclusively controls. And an input port coupled to a media segment that is exclusively controlled by another node of the bus. Each media segment typically includes a plurality of high speed data channels such as electrical transmission lines.
申请公布号 US2014301405(A1) 申请公布日期 2014.10.09
申请号 US201414307580 申请日期 2014.06.18
申请人 MICRON TECHNOLOGY, INC. 发明人 Regev Zvi;Regev Alon
分类号 H04L12/42 主分类号 H04L12/42
代理机构 代理人
主权项 1. A node for use in a first ring bus communication system, which interconnects a plurality of nodes, the node comprising: a plurality of input data ports, each receiving input data from an upstream node in serial format; a plurality of deserializer circuits each respectively associated with an input data port for receiving serial data from a respective input data port and converting it to parallel format; a plurality of input buffers each respectively associated with a deserializer circuit, for storing parallel format input data; a control circuit coupled to the plurality of input buffers for receiving stored input data and for controlling the flow of input and output data within the node, the control circuit containing the address of the node; an application circuit for receiving input data from the control circuit, and sending output data to the control circuit; a plurality of output buffers coupled to the control circuit each receiving parallel output data from the control circuit; a plurality of serializers respectively coupled to the plurality of output buffers each for connecting parallel output data from a respective buffer to serial data; and, a plurality of output ports respectively coupled to the serializers for providing serial output data to a downstream node; wherein the control circuit is configured to extract a node destination address from stored input data and, when the extracted node destination address corresponds to the node address, transfers the stored input data to the application circuit, and when the extracted node destination address does not correspond to the node address transfers the stored input data in the plurality of input buffers to the plurality of output buffers.
地址 Boise ID US