发明名称 Branch target buffer with efficient return prediction capability
摘要 <p>A branch target buffer (502) (BTBs) and methods of processing data in a microprocessor with a pipeline is provided. A method of fetching an address using a branch target buffer (BTB) (502), includes receiving data relating to an instruction address; determining whether one of a plurality of return entries stored in a return buffer correspond to the instruction address; outputting data from a return prediction stack (RPS) and a non-return buffer based on the determination. A BTB (502) is provided that includes a non-return buffer (506), a return buffer (504), and a multiplexer (508). The non-return buffer is designed to store a multiple of non-return entries. Each non-return entry corresponds to a non-return type instruction. The return buffer is designed to store a plurality of return entries that each correspond to a return type instruction and is further configured to generate a control signal. The multiplexer receives the control signal and outputs either data from the non-return buffer or data from a return prediction stack (RPS 510).</p>
申请公布号 GB2512732(A) 申请公布日期 2014.10.08
申请号 GB20140003301 申请日期 2014.02.25
申请人 MIPS TECHNOLOGIES, INC. 发明人 PARTHIV POTA;SANJAY PATEL
分类号 G06F9/38 主分类号 G06F9/38
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