发明名称
摘要 To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.
申请公布号 JP5602924(B2) 申请公布日期 2014.10.08
申请号 JP20130194868 申请日期 2013.09.20
申请人 发明人
分类号 H03K19/0175 主分类号 H03K19/0175
代理机构 代理人
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