发明名称 Method and apparatus for high resolution delay line
摘要 The present subject matter discusses, among other things, apparatus and methods for a delay line. In an example, a delay device can include a first node, a plurality of variable capacitor circuits configured to receive a capacitance set point voltage, a current source, a plurality of switches configured to selectively couple a respective variable capacitor of the plurality of variable capacitors to the first node, an input switch configured to receive an input signal and to couple and decouple the current source to the first node responsive to a state of the input signal, and a comparator configured to receive a reference voltage, to receive a voltage from the first node, and to provide an binary output indicative of a comparison between the reference voltage and the voltage from the first node, wherein the binary output is a delayed representation of the input signal.
申请公布号 US8854099(B1) 申请公布日期 2014.10.07
申请号 US201314061270 申请日期 2013.10.23
申请人 Analog Devices, Inc. 发明人 Miao Botao
分类号 H03H11/26;H03K5/14;H03K5/06 主分类号 H03H11/26
代理机构 Schwegman Lundberg & Woessner, P.A. 代理人 Schwegman Lundberg & Woessner, P.A.
主权项 1. A delay device comprising: a first node; a plurality of variable capacitor circuits configured to receive a capacitance set point voltage; a current source; a plurality of switches configured to selectively couple a respective variable capacitor of the plurality of variable capacitors to the first node; an input switch configured to receive an input signal and to couple and decouple the current source to the first node responsive to a state of the input signal; and a comparator configured to receive a reference voltage, to receive a voltage from the first node, and to provide an binary output indicative of a comparison between the reference voltage and the voltage from the first node, wherein the binary output is a delayed representation of the input signal.
地址 Norwood MA US