发明名称 |
Systems and methods for parallel retry processing during iterative data processing |
摘要 |
Systems, circuits, devices and/or methods related to systems and methods for data processing, and more particularly to systems and methods for priority based data processing. |
申请公布号 |
US8856631(B2) |
申请公布日期 |
2014.10.07 |
申请号 |
US201213644542 |
申请日期 |
2012.10.04 |
申请人 |
LSI Corporation |
发明人 |
Yang Shaohua;Zhang Fan;Xiao Jun |
分类号 |
H03M13/41 |
主分类号 |
H03M13/41 |
代理机构 |
Hamilton DeSanctis & Cha |
代理人 |
Hamilton DeSanctis & Cha |
主权项 |
1. A data processing system, the data processing system comprising:
a data detector circuit operable to apply a data detection algorithm to a detector input to yield a detected output; a data decoder circuit operable to apply a data decode algorithm to a decoder input derived from the detected output to yield a decoded output; an input buffer operable to maintain at least a first data set and a second data set, wherein the first data set completed a limited amount of processing by the data detector circuit and the decoder circuit without converging, and wherein the second data set is yet to complete the limited amount of processing by the data detector circuit and the decoder circuit; and a scheduling circuit operable to schedule processing of the first data set by one of the data detector circuit and the data decoder circuit in parallel with processing of the second data set by one of the data detector circuit and the data decoder circuit. |
地址 |
San Jose CA US |