发明名称 Semiconductor package with inner and outer leads
摘要 A semiconductor die has outer leads with an outer lead external connection section and an outer lead bonding section. Inner leads are spaced from the outer leads. Each of the inner leads has an inner lead external connection section spaced and downset from an inner lead bonding section. A non-electrically conductive die mount is molded onto upper surface areas of each inner lead external connection section. A semiconductor die is mounted on the non-electrically conductive die mount and bond wire provide interconnects for selectively electrically connecting bonding pads of the die to the inner lead bonding sections and at least one outer lead bonding section. A mold compound covers the semiconductor die, the bond wires, and the outer and inner lead bonding sections.
申请公布号 US8853840(B2) 申请公布日期 2014.10.07
申请号 US201313773594 申请日期 2013.02.21
申请人 Freescale Semiconductor, Inc. 发明人 Au Yin Kheng;Hiew Pey Fang;Yap Jia Lin
分类号 H01L23/49;H01L23/495;H01L21/56 主分类号 H01L23/49
代理机构 代理人 Bergere Charles
主权项 1. A semiconductor die package, comprising: a plurality of outer leads each having an outer lead external connection section and an outer lead bonding section; a plurality of inner leads spaced from the outer leads, each of the inner leads having an inner lead external connection section spaced and downset from an inner lead bonding section; a non-electrically conductive die mount molded onto upper surface areas of each inner lead external connection section and spaced from the plurality of outer leads; a semiconductor die mounted on the non-electrically conductive die mount; bond wires selectively electrically connecting bonding pads of the die to at least one inner lead bonding section and at least one outer lead bonding section; and a mold compound covering at least part of the semiconductor die, the bond wire, and the outer and inner lead bonding sections.
地址 Austin TX US