Method and apparatus for providing metric relating two or more process parameters to yield

摘要

A process and apparatus are provided for generating and evaluating one or more metrics for analyzing the design and manufacture of semiconductor devices. Embodiments include scanning a drawn semiconductor design layout to determine a difficult-to-manufacture pattern within the drawn semiconductor design layout based on a match with a pre-characterized difficult-to-manufacture pattern determining a corrected pattern based on a pre-determined correlation between the corrected pattern and the pre-characterized difficult-to-manufacture pattern, and replacing the difficult-to-manufacture pattern with the corrected pattern within the drawn semiconductor design layout.

主权项

1. A method comprising:
determining two or more parameters associated with designing a semiconductor device; determining two or more layers associated with designing the semiconductor device; determining a process window associated with acceptable limits of the two or more parameters; correlating distributions of the two or more parameters between the two or more layers; and applying, by a processor, a probability density function and the correlated distribution of the two or more parameters to the process window to generate a yield metric that relates the two or more parameters to yield.