发明名称 Methods for fabricating integrated circuits
摘要 Methods are provided for forming semiconductor devices. One method includes forming a first layer overlying a bulk semiconductor substrate. A second layer is formed overlying the first layer. A plurality of trenches is etched into the first and second layers. Portions of the second layer that are disposed between the plurality of trenches define a plurality of fins. A gate structure is formed overlying the plurality of fins. The first layer is etched to form gap spaces between the bulk semiconductor substrate and the plurality of fins. The plurality of fins is at least partially supported in position adjacent to the gap spaces by the gate structure. The gap spaces are filled with an insulating material.
申请公布号 US8853037(B2) 申请公布日期 2014.10.07
申请号 US201213420412 申请日期 2012.03.14
申请人 GLOBALFOUNDRIES, Inc. 发明人 Cho Jin
分类号 H01L21/336;H01L21/8234;H01L21/8238;H01L29/66;H01L29/78 主分类号 H01L21/336
代理机构 Ingrassia Fisher & Lorenz, P.C. 代理人 Ingrassia Fisher & Lorenz, P.C.
主权项 1. A method for fabricating an integrated circuit comprising: forming a first layer of a first semiconductor material overlying a bulk semiconductor substrate that is formed of a second semiconductor material; forming a second layer of a third semiconductor material overlying the first layer; etching a plurality of trenches into the first and second layers, wherein portions of the second layer disposed between the plurality of trenches define a plurality of fins; forming a gate structure overlying the plurality of fins; etching the first layer to form gap spaces between the bulk semiconductor substrate and the plurality of fins, wherein the plurality of fins are at least partially supported in position adjacent to the gap spaces by the gate structure; and filling the gap spaces with an insulating material.
地址 Grand Cayman KY