发明名称 |
Display device and method for manufacturing the same |
摘要 |
A gate insulating film has a convex portion conforming to a surface shape of a gate electrode and a step portion that changes in height from a periphery of the gate electrode along the surface of the gate electrode. An oxide semiconductor layer is disposed on the gate insulating film so as to have a transistor constituting region having a channel region, a source region, and a drain region in a continuous and integral manner and a covering region being separated from the transistor constituting region and covering the step portion of the gate insulating film. A channel protective layer is disposed on the channel region of the oxide semiconductor layer. A source electrode and a drain electrode are disposed in contact respectively with the source region and the drain region of the oxide semiconductor layer. A passivation layer is disposed on the source electrode and the drain electrode. |
申请公布号 |
US8853012(B2) |
申请公布日期 |
2014.10.07 |
申请号 |
US201313965418 |
申请日期 |
2013.08.13 |
申请人 |
Japan Display Inc. |
发明人 |
Uemura Norihiro;Noda Takeshi;Miyake Hidekazu;Suzumura Isao |
分类号 |
H01L21/00;H01L21/84;H01L33/00;H01L21/77 |
主分类号 |
H01L21/00 |
代理机构 |
Antonelli, Terry, Stout & Kraus, LLP. |
代理人 |
Antonelli, Terry, Stout & Kraus, LLP. |
主权项 |
1. A display device comprising:
a substrate; a gate electrode disposed on the substrate; a gate insulating film disposed on the substrate so as to cover the gate electrode and having a convex portion conforming to a surface shape of the gate electrode and a step portion that changes in height along a shape rising from a periphery of the gate electrode; an oxide semiconductor layer disposed on the gate insulating film so as to have a transistor constituting region having a channel region, a source region, and a drain region in a continuous and integral manner and a covering region being separated from the transistor constituting region and covering the step portion of the gate insulating film; a channel protective layer disposed on the channel region of the oxide semiconductor layer; a source electrode and a drain electrode disposed in contact respectively with the source region and the drain region of the oxide semiconductor layer; and a passivation layer disposed on the source electrode and the drain electrode. |
地址 |
Tokyo JP |