Methods and apparatus for low intrusion snoop invalidation

摘要

Efficient techniques are described for tracking a potential invalidation of a data cache entry in a data cache for which coherency is required. Coherency information is received that indicates a potential invalidation of a data cache entry. The coherency information in association with the data cache entry is retained to track the potential invalidation to the data cache entry. The retained coherency information is kept separate from state bits that are utilized in cache access operations. An invalidate bit, associated with a data cache entry, may be utilized to represents a potential invalidation of the data cache entry. The invalidate bit is set in response to the coherency information, to track the potential invalidation of the data cache entry. A valid bit associated with the data cache entry is set in response to the active invalidate bit and a memory synchronization command. The set invalidate bit is cleared after the valid bit has been cleared.

主权项

1. A method comprising:
receiving at a data cache a snoop invalidate signal and a snoop write address, the data cache comprising a snoop array and a first way; reading the snoop write address to identify a data cache entry in the first way; and setting an invalidate bit in the snoop array to indicate receiving the snoop invalidate signal for the data cache entry, wherein the invalidate bit is distinct from a valid bit associated with the data cache entry.