发明名称 |
AD converter circuit and ad conversion method |
摘要 |
A low-power and high-speed ADC includes: a successive approximation converter circuit configured to sequentially compare and coarsely convert the analog input signal voltage into a digital signal with a number of higher-order bits, and also to output a residual voltage; a fixed-quantity change time measurement converter circuit configured to finely convert the residual voltage into a digital signal with a number n of lower-order bits by changing the residual voltage at a fixed rate of change and by measuring the time until a predetermined value is reached; and an encoder circuit configured to generate a digital signal with the predetermined number of bits by combining the digital signal with the number of higher-order bits output from the successive approximation converter circuit and the digital signal with the number of lower-order bits output from the fixed-quantity change time measurement converter circuit. |
申请公布号 |
US8854243(B2) |
申请公布日期 |
2014.10.07 |
申请号 |
US201313869770 |
申请日期 |
2013.04.24 |
申请人 |
Fujitsu Limited;Fujitsu Semiconductor Limited |
发明人 |
Yoshioka Masato;Chen Yanfei;Ide Tatsuya |
分类号 |
H03M1/12;H03M1/14;H03M1/38;H03M1/46;H03M1/54 |
主分类号 |
H03M1/12 |
代理机构 |
Arent Fox LLP |
代理人 |
Arent Fox LLP |
主权项 |
1. An analog-to-digital converter circuit configured to convert an analog input signal voltage into a digital signal with a predetermined number of bits, comprising:
a successive approximation converter circuit configured to sequentially compare and coarsely convert the analog input signal voltage into a digital signal with a number of higher-order bits, and also to output a residual voltage between the analog input signal voltage and an analog signal voltage corresponding to the digital signal with the number of higher-order bits; a fixed-quantity change time measurement converter circuit configured to finely convert the residual voltage into a digital signal with a number n of lower-order bits by changing the residual voltage at a fixed rate of change and by measuring the time until a predetermined value is reached; and an encoder circuit configured to generate a digital signal with the predetermined number of bits by combining the digital signal with the number of higher-order bits output from the successive approximation converter circuit and the digital signal with the number of lower-order bits output from the fixed-quantity change time measurement converter circuit. |
地址 |
Kawasaki JP |