发明名称 |
HARMONIC REJECT RECEIVER ARCHITECTURE AND MIXER |
摘要 |
Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection. |
申请公布号 |
CA2590456(C) |
申请公布日期 |
2014.10.07 |
申请号 |
CA20052590456 |
申请日期 |
2005.12.12 |
申请人 |
MAXLINEAR INC. |
发明人 |
SEENDRIPU, KISHORE;MONTEMAYOR, RAYMOND;YE, SHENG;CHANG, GLENN;LING, CURTIS |
分类号 |
H04B1/10;H03D7/16 |
主分类号 |
H04B1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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