Nonvolatile memory device with improved integrated ratio

摘要

A nonvolatile memory device includes a number of page buffer groups each comprising a number of normal page buffers, I/O lines corresponding to the respective normal page buffers, and a column decoder generating a column address decoding signal for coupling the normal page buffers of one of the page buffer groups and the respective I/O lines in response to a normal control clock signal.

主权项

1. A nonvolatile memory device, comprising:
a normal page buffer unit selectively coupled to a number of I/O lines in response to column address decoding signals and configured to receive or output data; a redundancy page buffer unit selectively coupled to the I/O lines in response to redundancy column address decoding signals and configured to receive or output data; a normal column decoder configured to generate the column address decoding signals in response to a normal control clock signal and normal pre-decoding signals; a redundancy column decoder configured to generate the redundancy column address decoding signals in response to a redundancy control clock signal and redundancy pre-decoding signals; and a redundancy circuit configured to generate the normal control clock signal and the redundancy control clock signal in response to column address signals.