Electronic device and method for FRAM power supply management

摘要

The invention is an electronic device including a ferroelectric random access memory (FRAM), a first supply voltage domain, a second supply voltage domain and a low drop output voltage regulator (LDO) receive a first supply voltage of the first supply voltage domain and providing a second supply voltage of the second supply voltage domain. The second supply voltage domain supplies the FRAM. The LDO switches between a first state providing and maintaining the second supply voltage of the second supply voltage domain and a second state providing a high impedance output to the second supply voltage domain. The electronic device switches the LDO from the first state to the second state in response to a failure of the first supply voltage domain.

主权项

1. An electronic device comprising:
a first supply voltage domain having a first supply voltage; a second supply voltage domain having a second supply voltage; a low drop output voltage regulator (LDO) receiving and powered by said first supply voltage and providing said second supply voltage of said second supply voltage domain, said low drop output voltage regulator having a first state providing and maintaining said second supply voltage of said second supply voltage domain and having a second state providing a high impedance output to said second supply voltage domain, said low drop output voltage regulator switching from said first state to said second state in response to a failure of said first supply voltage domain; a ferroelectric random access memory (FRAM), said FRAM memory part of said second supply voltage domain and powered by said second supply voltage; a plurality of input buffers having inputs receiving signals intended for said FRAM memory and outputs connected to supply said signals to said FRAM memory, said plurality of input buffers part of said second voltage domain and powered by said second supply voltage; and a plurality of output buffers having inputs receiving signals from said FRAM memory and outputs connected to supply said signals to circuits outside said FRAM memory, said plurality of output buffers part of said second voltage domain and powered by said second supply voltage.