System, structure, and method of manufacturing a semiconductor substrate stack

摘要

A method of manufacturing a semiconductor substrate structure for use in a semiconductor substrate stack system is presented. The method includes a semiconductor substrate which includes a front-face, a backside, a bulk layer, an interconnect layer that includes a plurality of inter-metal dielectric layers sandwiched between conductive layers, a contact layer that is between the bulk layer and the interconnect layer, and a TSV structure commencing between the bulk layer and the contact layer and terminating at the backside of the substrate. The TSV structure is electrically coupled to the interconnect layer and the TSV structure is electrically coupled to a bonding pad on the backside.

主权项

1. An integrated circuit comprising:
a substrate having an active region formed in a top surface of the substrate; a plurality of vias, each extending through the substrate, each having a first termination substantially aligned with a bottom surface of the substrate and a second termination substantially aligned to the top surface of the substrate; wherein each first termination of the plurality of vias terminate on a common plane at the bottom surface and are electrically insulated from one another; a first conductive contact electrically connected to the second termination of at least one of the vias and electrically connected to a conductive interconnect layer; a first bonding joint connected to the second termination of the via and extending above a topmost insulator of the substrate, wherein there is no semiconductor substrate between the top surface of the substrate and the first bonding joint; and a second conductive contact electrically connected to the conductive interconnect layer and the active region.