发明名称 ADVANCED COARSE-GRAINED CACHE POWER MANAGEMENT
摘要 Methods and apparatuses for reducing power consumption of a system cache within a memory controller. The system cache includes multiple ways, and each way is powered independently of the other ways. A target active way count is maintained and the system cache attempts to keep the number of currently active ways equal to the target active way count. The bandwidth and allocation intention of the system cache is monitored. Based on these characteristics, the system cache adjusts the target active way count up or down, which then causes the number of currently active ways to rise or fall in response to the adjustment to the target active way count.
申请公布号 US2014297959(A1) 申请公布日期 2014.10.02
申请号 US201313855174 申请日期 2013.04.02
申请人 APPLE INC. 发明人 Shiu Shinye;Biswas Sukalpa;Klingauf Wolfgang H.;Hu Rong Zhang
分类号 G06F1/32;G06F12/08 主分类号 G06F1/32
代理机构 代理人
主权项 1. A cache comprising: a cache memory arranged as a set associative memory having a plurality of ways; and a cache control unit coupled to the cache memory, wherein the cache control unit is configured to: manage power to the plurality of ways by dynamically enabling and disabling ways of the plurality of ways;calculate a replacement and allocation failure count for the cache memory, wherein the replacement and allocation failure count tracks a number of requests that replace existing cache lines or fail to allocate in the cache memory over a first predetermined amount of time; anddecrease the number of active ways responsive to determining the replacement and allocation failure count is less than a first threshold.
地址 Cupertino CA US
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