| 摘要 |
A method for operating a system on a chip comprising a conventional processor unit (CISC, RISC, VLIW, DSP) and an array processor having a multidimensional arrangement of arithmetic units. Operation information for the array processor are stored in a memory shared between the conventional processor and the array processor. At runtime the conventional processor points the array processor to the memory area comprising the operation information. A management unit inside the array processor is autonomously loading the operation information into the array processor |
