METHODS FOR DESIGNING INTEGRATED CIRCUITS EMPLOYING VOLTAGE SCALING AND INTEGRATED CIRCUITS DESIGNED THEREBY

摘要

Various embodiments of methods of designing an integrated circuit (IC). One embodiment of one such method includes: (1) generating a functional IC design, (2) determining a target clock rate for the functional IC design, (3) synthesizing a netlist from the functional IC design that meets the target clock rate, (4) determining a performance/power ratio from the netlist, (5) attempting to increase the performance/power ratio by changing at least one of a speed, an area and a power consumption in at least some noncritical paths in the netlist, and (6) implementing a layout of the IC from the netlist.

主权项

1. A method of designing an integrated circuit, comprising:
generating a functional integrated circuit design; determining a target clock rate for said functional integrated circuit design; synthesizing a netlist from said functional integrated circuit design that meets said target clock rate; determining a performance/power ratio from said netlist; attempting to increase said performance/power ratio by changing at least one of a speed, an area and a power consumption in at least some noncritical paths in said netlist; and implementing a layout of said integrated circuit from said netlist.