发明名称 VERTICAL GALLIUM NITRIDE JFET WITH GATE AND SOURCE ELECTRODES ON REGROWN GATE
摘要 A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
申请公布号 US2014291691(A1) 申请公布日期 2014.10.02
申请号 US201414192662 申请日期 2014.02.27
申请人 Avogy, Inc. 发明人 Disney Donald R.;Nie Hui;Kizilyalli Isik C.;Brown Richard J.
分类号 H01L29/808;H01L29/66;H01L29/20 主分类号 H01L29/808
代理机构 代理人
主权项 1. (canceled)
地址 San Jose CA US