Data Transmission Using Delayed Timing Signals

摘要

An integrated circuit includes a delay circuit and first and second interface circuits. The delay circuit delays a first timing signal by an internal delay to generate an internal timing signal. The first interface circuit communicates data to an external device in response to the internal timing signal. The second interface circuit transmits an external timing signal for capturing the data in the external device. An external delay is added to the external timing signal in the external device to generate a delayed external timing signal. The delay circuit sets the internal delay based on a comparison between the delayed external timing signal and a calibration signal transmitted by the first interface circuit.

主权项

1. An integrated circuit comprising:
a first delay circuit to delay a first timing signal by an internal delay to generate an internal timing signal; a first interface circuit to communicate data to an external device in response to the internal timing signal; and a second interface circuit to transmit an external timing signal for capturing the data in the external device, wherein an external delay is added to the external timing signal in the external device to generate a delayed external timing signal, and wherein the first delay circuit sets the internal delay based on a comparison between the delayed external timing signal and a calibration signal transmitted by the first interface circuit.