| 主权项 |
1. A method comprising:
precharging a first bitline to a first voltage level, a plurality of dynamic random-access memory (DRAM) cells being operatively connected to an input side of a multiplexer device by said first bitline; precharging a second bitline to a second voltage level, a sense device being operatively connected to an output side of said multiplexer device by said second bitline, said sense device having a switch voltage and comprising: a pair of transistors arranged in an inverter configuration; and a read enable transistor operatively connected to said pair of transistors, said read enable transistor being connected to a third voltage level, selecting said second voltage level such that reception of a signal voltage of a first type adjusts a voltage of said second bitline in a first direction and reception of said signal voltage of a second type adjusts said voltage of said second bitline in a second direction opposite from said first direction, said second voltage centering said signal voltage around said switch voltage, said first voltage level, said second voltage level, and said third voltage level being different voltages; and passing, using said multiplexer, said signal voltage from a selected one of said plurality of DRAM cells to said second bitline through said first bitline. |
