MULTI-CORE SYSTEM AND METHOD OF DATA CONSISTENCY

摘要

A system comprises a plurality of cores and a communication bus enabling the cores to communicate with one another, a core having a processor and of at least one cache memory area. At least one core comprises a table of patterns storing a set of patterns, a pattern corresponding to a series of memory addresses associated with a digital data item made up of binary words stored at these addresses. This core also comprises means for mapping one of the memory addresses AdB of a digital data item to a pattern that is associated with it when said core needs to access this data item and means for transmitting a unique message for access to a digital data item located in the cache memory of at least one other core of the system, said message including the memory addresses that make up the pattern of the data item sought.

主权项

1. A multi-core system comprising a plurality of cores and a communication bus enabling the cores to communicate with one another, a core being made up of a processor and of at least one cache memory area, wherein:
at least one core comprises a table of patterns in which are stored a set of patterns, a pattern corresponding to a series of memory addresses associated with a digital data item made up of binary words stored at these addresses; this core also comprises means for mapping one of the memory addresses AdB of a digital data item to a pattern that is associated with it when said core needs to access this data item as well as means for transmitting a unique message for access to a digital data item located in the cache memory of at least one other core of the system, said message including the memory addresses that make up the pattern of the data item sought.