CHIP INCLUDING MEMORY ELEMENT STORING HIGHER LEVEL MEMORY DATA ON A PAGE BY PAGE BASIS

摘要

A bus system for transferring data between parts of a multiprocessor system. The bus system is divided into a plurality of segments. Each segment is controlled by a table providing routing information. The bus system establishes communication between a sender and a receiver according to data where the data includes an identifier that identifying the source of the data transfer and/or the target of the data transfer.

主权项

1. A bus system for transferring data between parts of a multiprocessor system, the bus system comprising:
a plurality of segments such that the bus system is divided into the plurality of segments, each of the segments are controlled by a table providing routing information; wherein a communication between a sender and a receiver is established relating to the routing information and in accordance with a data transfer for an executed algorithm; and at least one identifier is transmitted with the data for at least one of: identifying the source of the data transfer; and selecting a target of the data transfer.