| 摘要 |
When using a read circuit of a semiconductor memory device to read data in a memory cell through a bit line BLX, out of a bit line pair BL, BLX that have a complementary relationship to each other and are connected to the memory cell storing the data, control is performed by a discharge circuit disposed within the read circuit, based on the signal from the bit line BL and a signal indicating the memory cell, to prevent a rise in potential of an SOUT node of the read circuit, or to prevent a fall in potential of the SOUT node, according to the potentials of the bit line pair BL, BLX. The SOUT accordingly does not become a floating node, enabling reading malfunction due to leak current to be prevented and enabling increased reading speed. |
| 主权项 |
1. A semiconductor storage device, comprising:
a memory cell that stores data; a pair of bit lines connected to the memory cell; a read circuit that reads data in the memory cell via a first bit line out of the pair of bit lines; and a potential control circuit that, based on a signal from a second bit line out of the pair of bit lines and on a designation signal that designates the memory cell, effects control to prevent a rise in potential of an output terminal of the read circuit, or to prevent a fall in potential of the output terminal, in accordance with potentials of the first bit line and the second bit line. |
