发明名称 Transmission control checking for interconnect circuitry
摘要 Transmission control checking circuitry adds control check data to a transaction response which is received at a transaction master and compared with expected data at the transaction master. The expected data having control check data may be a unique transaction identifier. The transaction master generated the unique transaction identifier when it generated the transaction request and will check that the transaction responses include that unique transaction identifier. In this way, errors in the control of transmission of transactions (e.g. misrouting) may be detected.
申请公布号 GB201414417(D0) 申请公布日期 2014.10.01
申请号 GB20140014417 申请日期 2014.08.14
申请人 ARM LIMITED 发明人
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