发明名称 |
Fuse circuit, fuse array, semiconductor memory device and method of manufacturing semiconductor device |
摘要 |
A fuse circuit includes a program unit and a sensing unit. The program unit is programmed in response to a program signal and outputs a program output signal in response to a sensing enable signal. The sensing unit outputs a sensing output signal based on the program output signal and the sensing output signal indicates whether the program unit is programmed or not. The program unit includes an anti-fuse cell, a selection transistor, a program transistor and a sensing transistor. The anti-fuse cell includes at least two anti-fuse elements which are connected in parallel and are respectively broken down at different levels of a program voltage. |
申请公布号 |
US8848475(B2) |
申请公布日期 |
2014.09.30 |
申请号 |
US201113219749 |
申请日期 |
2011.08.29 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Son Jong-Pil;Jang Seong-Jin;Moon Byung-Sik;Jung Hyuck-Chai;Park Ju-Seop |
分类号 |
G11C17/18;G11C17/16;H01L27/10;H01L23/525 |
主分类号 |
G11C17/18 |
代理机构 |
Stanzione & Kim, LLP |
代理人 |
Stanzione & Kim, LLP |
主权项 |
1. A fuse circuit comprising:
a program unit configured to be programmed in response to a program signal and configured to output a program output signal in response to a sensing enable signal; and a sensing unit configured to output a sensing output signal based on the program output signal, the sensing output signal indicating whether the program unit is programmed or not, the program unit comprising:
an anti-fuse cell including at least two anti-fuse elements which are connected in parallel and are respectively broken down at different levels of a program voltage, the anti-fuse cell including a first node and a second node, the first node receiving the program voltage;a selection transistor, connected between the second node and a connection node, the selection transistor having a gate which receives a selection signal;a program transistor, connected between the connection node and a ground voltage, the program transistor having a gate which receives the program signal; anda sensing transistor which has a first terminal connected to the connection node, a gate receiving the sensing enable signal and a second terminal providing the program output signal. |
地址 |
Suwon-si KR |