发明名称 Semiconductor device and method of driving semiconductor device
摘要 A semiconductor device which is capable of high-speed writing with less power consumption and suitable for multi-leveled memory, and verifying operation. A memory cell included in the semiconductor device included a transistor formed using an oxide semiconductor and a transistor formed using a material other than an oxide semiconductor. A variation in threshold value of the memory cells is derived before data of a data buffer is written by using a writing circuit. Data in which the variation in threshold value is compensated with respect to the data of the data buffer is written to the memory cell.
申请公布号 US8848464(B2) 申请公布日期 2014.09.30
申请号 US201213455227 申请日期 2012.04.25
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Sekine Yusuke;Kato Kiyoshi
分类号 G11C7/00;G11C11/403;G11C19/28;G11C11/4096;G11C11/56 主分类号 G11C7/00
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A semiconductor device comprising: a bit line; a word line; a memory cell comprising: a first transistor including a channel region comprising an oxide semiconductor,a second transistor including a channel region comprising any of silicon, germanium, silicon germanium, silicon carbide, and gallium arsenide, anda capacitor, wherein one of a source and a drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to the bit line, wherein the other of the source and the drain of the first transistor and a gate of the second transistor are electrically connected to one of electrodes of the capacitor, and wherein the other of the electrodes of the capacitor is electrically connected to the word line; and a writing circuit electrically connected to the memory cell through the bit line, the writing circuit configured to input one of a plurality of write data potentials or a reference potential as a write data potential to the memory cell, and wherein the writing circuit is configured to write the one of the plurality of write data potentials to the memory cell when a potential applied to the gate of the second transistor is higher than a threshold voltage of the second transistor.
地址 Kanagawa-ken JP