System and method to provide non-coherent access to a coherent memory system

摘要

In one embodiment, a system comprises a memory and a memory controller that provides a cache access path to the memory and a bypass-cache access path to the memory, receives requests to read graph data from the memory on the bypass-cache access path and receives requests to read non-graph data from the memory on the cache access path. A method comprises receiving a request at a memory controller to read graph data from a memory on a bypass-cache access path, receiving a request at the memory controller to read non-graph data from the memory through a cache access path, and arbitrating, in the memory controller, among the requests using arbitration.

主权项

1. A system comprising:
a memory; a memory controller providing a cache access path to the memory and a bypass-cache access path to the memory, the memory controller receiving requests to read deterministic finite automata (DFA), non-deterministic finite automata (NFA), or hyper finite automata (HFA) graph data from the memory on the bypass-cache access path and receiving requests to read non-DFA, -NFA or -HFA graph data from the memory on the cache access path, the non-DFA, -NFA or -HFA graph data being packet data.