发明名称 Waveform generator
摘要 A waveform generator for providing an analog output signal to a target device includes a look-up-table (LUT) that stores a plurality of binary address values and a digital-to-analog converter (DAC) that generates the analog output signal. The waveform generator receives an input trigger signal from the target device when the target device is ready to receive the analog output signal. The waveform generator generates a synchronized input trigger signal and aligns the analog output signal with the synchronized input trigger signal by reloading the LUT with a binary address value of zero.
申请公布号 US8847639(B1) 申请公布日期 2014.09.30
申请号 US201314141466 申请日期 2013.12.27
申请人 Freescale Semiconductor, Inc. 发明人 Srivastava Alok;Priya Shrestha
分类号 H03B28/00;H04L7/04;H04L7/00 主分类号 H03B28/00
代理机构 代理人 Bergere Charles
主权项 1. A waveform generator for providing an analog output signal to a target device, comprising: a look-up table (LUT) for storing a plurality of binary address values; a digital-to-analog converter (DAC), connected to the LUT, for generating the analog output signal based on the plurality of binary address values; a rising-edge detector for receiving an input trigger signal from the target device and detecting a rising edge of the input trigger signal; a LUT address capture module, connected to the LUT and the rising-edge detector, for capturing a binary address value of the plurality of binary address values, wherein the binary address value corresponds to the rising edge of the input trigger signal; a digital comparator, connected to the LUT address capture module, for comparing the captured binary address value with a set of predetermined binary address values and generating a first output signal when the captured binary address value matches a binary address value of the set of predetermined binary address values; and a compensator module, connected to the digital comparator, the rising-edge detector and the LUT, for providing a reload signal to the LUT based on the first output signal, and reloading a first binary address value of the plurality of binary address values in to the LUT, wherein the DAC re-initiates the generation of the analog output signal from the first binary address value, thereby aligning the analog output signal with the input trigger signal.
地址 Austin TX US