Hierarchical design of integrated circuits with multi-patterning requirements

摘要

Systems and methods for avoiding restrictions on cell placement in a hierarchical design of integrated circuits with multi-patterning requirements are described. The method may be provided implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions operable to assign a color to each pattern shape in a first cell, assign a color to each pattern shape in a second cell, characterize quantities of interest for each pattern shape in the first cell, determine that the colors assigned in the first cell are all one to one mappable to the colors assigned in the second cells, characterize quantities of interest for each pattern shape in the second cell using the quantities of interest characterized for the first cell, and model the quantities of interest for the first cell and the second cell.

主权项

1. A method implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions operable to:
assign a color to each pattern shape in a first cell; assign a color to each pattern shape in a second cell; characterize quantities of interest for each pattern shape in the first cell as a function of at least one first set of parameters associated with each pattern shape in the first cell; determine that the colors assigned in the first cell are all one to one mappable to the colors assigned in the second cell; characterize quantities of interest for each pattern shape in the second cell using the quantities of interest characterized for the first cell as a function of at least one second set of parameters associated with each pattern shape in the second cell; and model the quantities of interest for the first cell and the second cell, wherein at least the step of modeling the quantities of interest is performed using at least one processor.