Thin film transistor array panel and manufacturing method thereof

摘要

A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

主权项

1. A method of manufacturing a thin film transistor panel comprising:
forming a gate electrode on an insulating substrate; forming a gate insulating layer on the gate electrode; forming a semiconductor on the gate insulating layer, wherein the semiconductor comprises a first portion overlapping the gate electrode and a second portion not overlapping the gate electrode; forming a source electrode and a drain electrode on the semiconductor; and forming an ohmic contact layer at an interface between at least one of the source electrode and the drain electrode, and the semiconductor after forming the source electrode and the drain electrode, wherein one of the source electrode and the drain electrode is formed on the first portion of the semiconductor and the other one of the source electrode and the drain electrode is formed on the second portion of the semiconductor, wherein one of the source electrode and the drain electrode overlaps the gate electrode and the other one does not overlap the gate electrode, wherein surface heights of the source electrode and the drain electrode are different, and surface heights of the semiconductor and the ohmic contact layer are the same.