Power management for a system on a chip (SoC)

摘要

In one embodiment, the present invention includes a method for sending a first link handshake signal between a first subsystem and a power management unit (PMU) of a system on a chip (SoC) to request entry into a power saving state for the first subsystem, sending a second link handshake signal between the first subsystem and the PMU to acknowledge the request, and placing the first subsystem into the power saving state without further signaling between the PMU and the first subsystem. Other embodiments are described and claimed.

主权项

1. A system comprising:
a plurality of resources formed on a single semiconductor device and each of an independent domain; an interconnect of the single semiconductor device to communicate with the plurality of resources; and a power management unit (PMU) of the single semiconductor device to provide clock signals for each of the plurality of resources, wherein the PMU is to implement a common power management protocol across the plurality of resources independent of an operating system (OS) of the system, the common power management protocol to enable an intermediate power saving state between consecutive device power states of an OS-driven power management system, wherein a first resource and a second resource are controllable to be maintained in different power states via the PMU.