发明名称 Circuit and method of adjusting system clock in low voltage detection, and low voltage reset circuit
摘要 The present invention discloses a circuit and a method of adjusting system clock in low voltage detection, and a low voltage reset circuit. The circuit of adjusting system clock in low voltage detection comprises: a clock generator for supplying a clock to at least one circuit in a system; and a low voltage reset circuit for generating an adjustment signal according to a detected voltage level, so that the clock generator adjusts or stops the clock supplied to the at least one circuit in the system.
申请公布号 US8847649(B2) 申请公布日期 2014.09.30
申请号 US200912587037 申请日期 2009.10.01
申请人 Realtek Semiconductor Corp. 发明人 Wu Wen-Che
分类号 H03K3/017;G06F1/30;G06F1/24 主分类号 H03K3/017
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. A circuit of adjusting system clock in low voltage detection, comprising: a clock generator for supplying a clock to at least one circuit in a system; and a low voltage reset circuit for generating an adjustment signal that is input to the clock generator according to a detected voltage level of a supply voltage, so that the clock generator adjusts or stops the clock supplied to the at least one circuit in the system, when the detected voltage level is lower than a predetermined first threshold value, the low voltage reset circuit generates the adjustment signal, and wherein the low voltage reset circuit also generates a reset signal that is input to the at least one circuit when the detected voltage level is lower than a predetermined second threshold value, such that the at least one circuit in the system is reset to a predetermined value, wherein the predetermined first threshold value is greater than the predetermined second threshold value.
地址 Hsinchu TW