发明名称 |
Operation of a dual instruction pipe virus co-processor |
摘要 |
Circuits and methods are provided for detecting, identifying and/or removing undesired content. According to one embodiment, a content object is stored by a general purpose processor to a system memory. The memory has stored therein a page directory containing information for translating virtual addresses to physical addresses. Multiple most recently used entries of the page directory are cached, by a virus co-processor, within translation lookaside buffers (TLBs) implemented within an on-chip cache of the co-processor. Instructions are read by the co-processor, from a virus signature memory of the co-processor. The instructions contain op-codes of a first and second instruction type. Instructions of the first type are assigned to a first instruction pipe of the co-processor. An instruction assigned to the first instruction pipe is executed including accessing the content object by performing direct virtual memory addressing of the system memory and comparing the content object against a string. |
申请公布号 |
US8850586(B2) |
申请公布日期 |
2014.09.30 |
申请号 |
US201414266672 |
申请日期 |
2014.04.30 |
申请人 |
Fortinet, Inc. |
发明人 |
Zhou Xu;Huang Lin;Xie Michael |
分类号 |
G06F21/00;G06F12/14;G06F21/56;H04L29/06;G06F21/55 |
主分类号 |
G06F21/00 |
代理机构 |
Hamilton, DeSanctis & Cha LLP |
代理人 |
Hamilton, DeSanctis & Cha LLP |
主权项 |
1. A method of virus processing content objects, the method comprising:
storing, by a general purpose processor, a content object that is to be virus processed to a system memory of the general purpose processor using a virtual address, the system memory having stored therein a page directory containing information for translating virtual addresses to physical addresses within a physical address space of the system memory; caching, by a virus co-processor, coupled to the general purpose processor via an interconnect bus, a plurality of most recently used entries of the page directory within one or more translation lookaside buffers implemented within an on-chip cache of the virus co-processor; reading, by the virus co-processor, a subset of instructions from a virus signature memory of the virus co-processor, the subset of instructions containing op-codes of a first instruction type and op-codes of a second instruction type; assigning, by the virus co-processor, instructions of the subset of instructions of the first instruction type to a first instruction pipe of a plurality of instruction pipes of the virus co-processor for execution; and executing, by the first instruction pipe, an instruction of the instructions assigned to the first instruction pipe including accessing a portion of the content object from the system memory by performing direct virtual memory addressing of the system memory using a physical address derived based on the virtual address and the one or more translation lookaside buffers and comparing the portion of the content object against a string associated with the instruction. |
地址 |
Sunnyvale CA US |