| 摘要 |
Provided is a processor including an instruction issue unit that issues a vector load instruction read from a main memory based on branch target prediction of a branch target in a branch instruction, a data acquisition unit that starts issue of a plurality of acquisition requests for acquiring a plurality of vector data based on the issued vector load instruction from the main memory, a determination unit that determines a success or a failure of the branch target prediction after the branch target is determined, and a vector load management unit that, when the branch target prediction is determined to be a success, acquires all vector data based on the plurality of acquisition requests and then transfers all the vector data to a vector register, and, when the branch target prediction is determined to be a failure, discards the vector data acquired by the issued acquisition requests. |
| 主权项 |
1. A processor comprising:
an instruction issue unit that issues a vector load instruction read from a main memory based on branch target prediction of a branch target in a branch instruction; a data acquisition unit that starts issue of a plurality of acquisition requests for acquiring a plurality of vector data based on the issued vector load instruction from the main memory; a vector register that stores vector data to be used for a vector operation based on the vector load instruction; a determination unit that determines a success or a failure of the branch target prediction after the branch target in the branch instruction is determined; and a vector load management unit that, when the branch target prediction is determined to be a success by the determination unit, acquires all vector data based on the plurality of acquisition requests and then transfers all the vector data to the vector register, and, when the branch target prediction is determined to be a failure, discards the vector data acquired by the acquisition requests issued by the data acquisition unit; wherein:
a plurality of branch instructions exist prior to the issued vector load instruction,the vector load management unit includes a storage unit that stores a determination result of a success or a failure of the branch target prediction,the determination result contains branch information indicating the number of branch instructions with an indeterminate branch target and prediction failure information indicating a failure of the branch target prediction,the instruction issue unit notifies about the number of branch instructions prior to the vector load instruction to the vector load management unit upon issuing the vector load instruction,the determination unit determines a success or a failure of the branch target prediction each time a branch target corresponding to each of the plurality of branch instructions is determined,the vector load management unit stores the number of branch instructions which the instruction issue unit has notified about as the branch information into the storage unit,the vector load management unit updates the determination result stored in the storage unit each time a success or a failure of the branch target prediction is determined by the determination unit,when the branch target prediction is determined to be a success by the determination unit, the vector load management unit decrements the branch information stored in the storage unit,when the branch target prediction is determined to be a failure by the determination unit, the vector load management unit updates the prediction failure information stored in the storage unit to valid, andthe vector load management unit transfers all the vector data when the branch information stored in the storage unit is 0 and the prediction failure information is invalid after determination of the branch target prediction for all branch instructions is completed by the determination unit and all the vector data have been acquired, and discards the vector data acquired by the acquisition requests issued by the data acquisition unit when the prediction failure information is valid. |
