发明名称 ARITHMETIC PROCESSING APPARATUS AND METHOD OF CONTROLLING THE SAME
摘要 PROBLEM TO BE SOLVED: To reduce the frequency of snooping in a multi-core system to improve performance.SOLUTION: In a multi-core system, a plurality of CPUs each having a cache memory share one main memory. A write buffer having multi-stage buffers holding data to be written to the main memory and a write address thereof is disposed between the cache memory and the main memory. In writing data from the cache memory to the write buffer, the write address and an address stored in the buffer are compared. If there is a buffer having a corresponding address, the data is overwritten on the buffer, and the buffer is logically moved to the last stage.
申请公布号 JP2014182488(A) 申请公布日期 2014.09.29
申请号 JP20130055470 申请日期 2013.03.18
申请人 FUJITSU LTD 发明人 FUKUDA TAKATOSHI;TAKADA SHUJI;MORI KENSHIRO
分类号 G06F12/08 主分类号 G06F12/08
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