发明名称 |
METHOD AND DEVICE FOR MANAGING A KEY MATRIX, CORRESPONDING COMPUTER PROGRAM PRODUCT AND STORAGE DEVICE |
摘要 |
A method for managing, by device, a matrix of keys, including at least one line and at least two columns, each key making short circuiting a line and a column when pressed. The method includes a sweeping phase, including, for each line: writing a predetermined logic value in the line; and for each column, reading a logic value in the column and comparing the read logic value and the predetermined logic value. For each line processed: the writing step is carried out during a predetermined time interval. For each column, the reading step is carried out during a first portion of the time interval. The sweeping phase further includes, for each column, writing the predetermined logic value in the column during a second portion of the predetermined time interval. The predetermined time interval is equal to the sum of the durations of the first and second portions. |
申请公布号 |
US2014285365(A1) |
申请公布日期 |
2014.09.25 |
申请号 |
US201214354844 |
申请日期 |
2012.10.25 |
申请人 |
Compagnie Industrielle Et Financiere D'Ingenierie |
发明人 |
Bellahcene Mohammed;Benoit Olivier;Delorme Jean-Jacques |
分类号 |
G06F3/02 |
主分类号 |
G06F3/02 |
代理机构 |
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代理人 |
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主权项 |
1. A method for management, by a device, of a matrix of keys comprising at least one row and at least two columns, each key making it possible, when it is pressed, to short-circuit a row and a column of said matrix, the method comprising at least one iteration of a scan phase comprising the following steps performed by the device for each of the rows processed successively:
writing a predetermined logic value to the row; and for each column, reading a logic value on the column and determining whether the column is short-circuited with the row, by comparison between the logic value read and the predetermined logic value,wherein, for each of the rows processed successively:
the step of writing the predetermined logic value to the row is performed during a predetermined time slot; during said predetermined time slot, for each of said columns:
the step of reading a logic value on the column is performed during a first part of said predetermined time slot; andthe scan phase comprises an additional step of writing the predetermined logic value to the column during a second part of said predetermined time slot, the duration of said predetermined time slot being equal to the sum of the durations of the first and second parts. |
地址 |
Paris FR |