发明名称 SPACER ENABLED POLY GATE
摘要 A spacer etching process produces ultra-narrow polysilicon and gate oxides for insulated gates used with insulated gate transistors. Narrow channels are formed using dielectric and spacer film deposition techniques. The spacer film is removed from the dielectric wherein narrow channels are formed therein. Insulating gate oxides (230a-230d) are grown on portions of the semiconductor substrate exposed at the bottoms of these narrow channels. Then the narrow channels are filled with polysilicon (232). The dielectric is removed from the face of the semiconductor substrate, leaving only the very narrow gate oxides and the polysilicon. The very narrow gate oxides and the polysilicon are separated into insulated gates for the insulated gate transistors.
申请公布号 WO2014149587(A1) 申请公布日期 2014.09.25
申请号 WO2014US19742 申请日期 2014.03.01
申请人 MICROCHIP TECHNOLOGY INCORPORATED 发明人 FEST, PAUL
分类号 H01L21/8234;H01L21/28 主分类号 H01L21/8234
代理机构 代理人
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