| 发明名称 |
TESTING APPARATUS FOR PROVIDING PER PIN LEVEL SETTING |
| 摘要 |
A testing apparatus for providing per pin level setting is disclosed, and the testing apparatus includes a control unit and a filter circuit, where the control unit is electrically connected to the filter circuit. The control unit includes a field programmable gate array (FPGA) for providing a PWM signal. The filter circuit receives the PWM signal and outputs at least one DC voltage. |
| 申请公布号 |
US2014285228(A1) |
申请公布日期 |
2014.09.25 |
| 申请号 |
US201313897239 |
申请日期 |
2013.05.17 |
| 申请人 |
TEST RESEARCH, INC. |
发明人 |
CHEN Hsin-Hao;KUO Po-Shen |
| 分类号 |
G01R1/073 |
主分类号 |
G01R1/073 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A testing apparatus for providing per pin level setting, the testing apparatus comprising:
a control unit comprising a field programmable gate array (FPGA) for providing a pulse width modulation (PWM) signal; and a filter circuit electrically connected to the control unit for receiving the PWM signal and outputting at least one direct current (DC) voltage. |
| 地址 |
Taipei City TW |
