发明名称 SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE
摘要 To improve the assemblability of a semiconductor device.;When a memory chip is mounted over a logic chip, a recognition range including a recognition mark formed at a back surface of the logic chip is imaged and a shape of the recognition range is recognized, alignment of a plurality of bumps of the logic chip and a plurality of projection electrodes of the above-described memory chip is performed based on a result of the recognition, and the above-described memory chip is mounted over the logic chip. At this time, the shape of the recognition range is different from any portion of an array shape of the bumps, as a result, the recognition mark in the shape of the recognition range can be reliably recognized, and alignment of the bumps of the logic chip and the projection electrodes of the above-described memory chip is performed with high accuracy.
申请公布号 US2014287541(A1) 申请公布日期 2014.09.25
申请号 US201414194874 申请日期 2014.03.03
申请人 Renesas Electronics Corporation 发明人 Yasumura Bunji;Deguchi Yoshinori;Takei Fumikazu;Hasebe Akio;Makihira Naohiro;Kubo Mitsuyuki
分类号 H01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项 1. A method for manufacturing a semiconductor device, comprising the steps of: (a) preparing a first semiconductor chip that has a first main surface and a second main surface on a side opposite to the first main surface, and a second semiconductor chip that has a first main surface, and a second main surface on a side opposite to the first main surface; and (b) mounting the second semiconductor chip over the first semiconductor chip so that the second main surface of the first semiconductor chip and the first main surface of the second semiconductor chip face each other, wherein a plurality of electrode pads arranged in a matrix form and a recognition mark are arranged over the second main surface of the first semiconductor chip, wherein a plurality of projection electrodes corresponding to the electrode pads of the first semiconductor chip is arranged over the first main surface of the second semiconductor chip, the (b) step including the steps of: (b1) imaging a recognition range including the recognition mark over the second main surface of the first semiconductor chip, and recognizing a shape of the recognition range; (b2) performing alignment of the electrode pads of the first semiconductor chip and the projection electrodes of the second semiconductor chip based on a result of having recognized the shape of the recognition range; and (b3) mounting the second semiconductor chip over the first semiconductor chip, and electrically coupling the electrode pads of the first semiconductor chip and the projection electrodes of the second semiconductor chip, and wherein the shape of the recognition range is different from any portion of an array shape of the electrode pads.
地址 Kawasaki-shi JP