| 摘要 |
An MOS semiconductor device including an MOS gate structure is disclosed. The MOS semiconductor device includes a p-type well region selectively disposed on the surface layer of an n-type drift layer formed on a semiconductor substrate forming an n-type drain region; an n-type source region selectively disposed on the surface layer of the p-type well region; and a gate electrode placed, via an insulating film, on the surface of a channel formation region on the surface layer of the p-type well region sandwiched between the n-type source region and the surface layer of the n-type drain region, wherein a surface in the channel formation region has a level difference formed in the direction of the peripheral length, and all over the length, of the channel formation region. |
| 主权项 |
1. An MOS semiconductor device including an MOS gate structure, the MOS semiconductor device comprising:
a first conductivity type semiconductor substrate that is formed on a drain region; a drift region that is formed on the drain region; a second conductivity type well region selectively disposed on the surface layer of the first conductivity type drift region; a first conductivity type source region selectively disposed on the surface layer of the second conductivity type well region; and a gate electrode that covers, via an insulating film, a surface of a channel formation region on the surface layer of the second conductivity type well region sandwiched between the first conductivity type source region and the surface layer of the first conductivity type drift region; wherein a surface in the channel formation region has a level difference formed in the direction of the peripheral length, and across the length, of the channel formation region. |
