发明名称 POWER OVERLAY STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a power overlay (POL) packaging structure having an improved thermal interface.SOLUTION: A power overlay (POL) sub-module of a POL structure contains a dielectric layer, and a semiconductor device having an upper surface attached to the dielectric layer. At least one contact pad is formed on the upper surface of the semiconductor device. The POL sub-module also contains a metal wiring structure extending through the dielectric layer and electrically coupled to at least one contact pad of the semiconductor device. A conductive shim is coupled to a bottom surface of the semiconductor device, and the conductive shim is coupled to a first side of a thermal interface. A heat sink is coupled to a second side of an electrical insulation thermal interface.
申请公布号 JP2014179611(A) 申请公布日期 2014.09.25
申请号 JP20140048289 申请日期 2014.03.12
申请人 GENERAL ELECTRIC CO <GE> 发明人 GOWDA ARUN VIRUPAKSHA;SHAKTI SINGH CHAUHAN;MCCONNELEE PAUL ALAN
分类号 H01L23/29;H01L23/12;H01L23/14;H01L23/36;H01L25/07;H01L25/18 主分类号 H01L23/29
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