NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE

摘要

According to one embodiment, a non-volatile semiconductor memory device which is provided with a memory cell array, bit lines, word lines, and a sense amplifier circuit is presented. The memory cell array includes memory cells. The bit lines are electrically connected to the memory cells. The word lines are electrically connected to gates of the non-volatile memory cells. The sense amplifier circuit includes sense amplifiers which are electrically connected to the bit lines. Each of the sense amplifiers includes a latch circuit which is capable of holding data, and a detection circuit. The sense amplifiers are configured to apply any one of a first voltage and a second voltage higher than the first voltage to the bit lines respectively. The sense amplifiers apply any one of the first voltage and the second voltage s a third voltage to the bit lines, and apply the third voltage to the detection circuit.

主权项

1. A non-volatile semiconductor memory device, comprising:
a memory cell array including memory cells; bit lines electrically connected to the memory cells; word lines electrically connected to gates of the non-volatile memory cells; and a sense amplifier circuit including sense amplifiers electrically connected to the bit lines, each of the sense amplifiers including a latch circuit which is capable of holding data, and a detection circuit, further the sense amplifiers being configured to apply any one of a first voltage and a second voltage higher than the first voltage to the bit lines respectively, wherein the sense amplifiers apply any one of the first voltage and the second voltage as a third voltage to the bit lines, and applies the third voltage to the detection circuit.