SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE

摘要

Provided is a semiconductor chip that is flip-chip mounted where an inner chip pad array and an outer chip pad array, which are arranged on an inner side and an outer side of IO cells in a staggered manner, are arranged to be spaced away from each other by a predetermined gap or greater. The predetermined gap represents a gap where one via can be arranged between an inner substrate pad array and an outer substrate pad array on a substrate which faces and is connected to the inner chip pad array and the outer chip pad array. In addition, the predetermined gap represents a gap where a plated wire is interconnected and then a resist opening for etch-back can be formed. Even in a case where a space for forming an interconnection is not present between outer substrate pad arrays, interconnection characteristics of the substrate are improved.

主权项

1. A semiconductor device comprising:
a semiconductor chip which includes a plurality of chip pads; and a substrate on which the semiconductor chip is flip-chip mounted and which includes substrate pads that are connected to the chip pads, and a via, wherein the semiconductor chip includes an input and output cell array that is constituted by a plurality of input and output cells including a first input and output cell, a second input and output cell, and a third input and output cell which are linearly arranged and are adjacent to each other, the plurality of chip pads include a first pad that is electrically connected to the first input and output cell, a second pad that is electrically connected to the second input and output cell, and a third pad that is electrically connected to the third input and output cell, the substrate includes a first substrate pad that faces and is connected to the first pad, a second substrate pad that faces and is connected to the second pad, and a third substrate pad that faces and is connected to the third pad, a gap between the first substrate pad and the third substrate pad is narrower than the sum of a minimum width of an interconnection which is permitted from design constraints on the substrate and two times a space value that is required for the interconnection and each of the substrate pads, in the semiconductor chip, the first pad and the third pad are arranged adjacent to each other on a side further outward in comparison to the input and output cell array, and the second pad is arranged on an inner side in comparison to the input and output cell array to be spaced away from each of the first pad and the third pad in such a manner that the second substrate pad is arranged to be spaced away from the first substrate pad and the third substrate pad by a distance that is equal to or greater than the sum of a diameter of the via provided to the substrate on which the semiconductor chip is flip-chip mounted and two times a minimum space value that is required for a gap between the via and each of the substrate pads in design constraints; wherein the semiconductor chip is flip-chip mounted on the substrate with a liquid curable resin interposed between the semiconductor chip and the substrate, the semiconductor chip includes a first pad array in which a plurality of pads including the first pad and third pad are adjacent to each other, and are linearly arranged in parallel with the input and output cell array on a side further outward in comparison to the input and output cell array, and a second pad array in which a plurality of pads including the second pad are adjacent to each other, and are linearly arranged in parallel with the input and output cell array on a side further inward in comparison to the input and output cell array, the substrate includes a solder resist, a first substrate pad array constituted by a plurality of substrate pads that face and are connected to a plurality of pads that constitute the first pad array, and a second substrate pad array constituted by a plurality of substrate pads that face and are connected to a plurality of pads that constitute the second pad array, and the solder resist is provided to a surface of the substrate on which the semiconductor chip is flip-chip mounted, and the solder resist has a solder resist opening in a region in which the plurality of substrate pads that constitute the second substrate pad array are arranged.