发明名称 MULTI-WIRE OPEN-DRAIN LINK WITH DATA SYMBOL TRANSITION BASED CLOCKING
摘要 A method, an apparatus, and a computer program product are described. The apparatus generates a receive clock signal for receiving data from a multi-wire opendrain link by determining a transition in a signal received from the multi-wire opendrain link, generating a clock pulse responsive to the transition, delaying the clock pulse by a preconfigured first interval if the transition is in a first direction, and delaying the clock by a preconfigured second interval if the transition is in a second direction. The preconfigured first and/or second intervals are configured based on a rise time and/or a fall time associated with the communication interface and may be calibrated by measuring respective delays associated with clock pulses generated for first and second calibration transitions.
申请公布号 WO2014153472(A1) 申请公布日期 2014.09.25
申请号 WO2014US31363 申请日期 2014.03.20
申请人 QUALCOMM INCORPORATED 发明人 SENGOKU, SHOICHIRO;CHEUNG, JOSEPH;WILEY, GEORGE ALAN
分类号 H04L7/033;H03K3/017;H03K5/153;H03L7/081 主分类号 H04L7/033
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