| 摘要 |
<p>A method, an apparatus, and a system to recover a clock for a bus include assigning a master lane, locking non-master lanes to the master lane, filling the master lane during data inactivity, idling the non-master lanes during data inactivity, maintaining a clock for the master lane, and recovering a clock for the non-master lanes from the master lane. A method, an apparatus, and a system to transmit and receive serial data with an unsynchronized clock include: transmitting data in a bit stream, wherein the data have multiple bit redundancy; receiving the data in the bit stream; sampling a value of the data in the bit stream; using voting on the value of the data in the bit stream; and determining a correct logic state for the data from the voting.</p> |
